WISEN-4 AX3000/BE3600
2.4GHz/5Ghz Wi-Fi 6 AP-Router Solution
WISEN-4 是一款高度集成的系统级芯片(SoC),专为高性能无线网络路由器设计,目标应用包括家庭无线连接和商用 AP 路由器等。
该芯片采用先进的硅工艺制造,集成了双核 Arm® Cortex-A53 MPCore™ 处理器,主频高达 1.6 GHz,并具备增强的 DRAM 带宽。SoC 提供丰富的外设接口,包括 SGMII 和 USB 3.0 主机端口。为满足现代网络需求,它还支持两个 2.5Gbps HSGMII 以太网接口。WISEN-4 构成了适用于 Wi-Fi 6 AX3000 / Wi-Fi 7 BE3600 无线路由平台的完整双频并发芯片组解决方案。
除了核心网络连接功能外,WISEN-4 还通过硬件级 NAT 引擎和内建服务质量(QoS)机制提升家庭娱乐体验。该引擎可优先处理音视频等对时延敏感的流量,相较于普通数据流量具有更高优先级。
凭借其先进的技术与全面的功能特性,WISEN-4 是下一代智能 Wi-Fi 接入点路由器与家庭网关系统的理想核心平台。
WLAN
- IEEE 802.11 b/g/n/ac/ax compliant
- Dual-band (2.4GHz 5GHz) MIMO RF, 20/40/80/160MHz bandwidth
- 2.4G support 20/40MHz. bandwidth auto adaption or fixed bandwidth
- 5G support 20/40/80/160MHz bandwidth auto adaption or fixed bandwidth
- Support TWT
- Security support for WFA WPA2/WPA3
- Support 802.11n MCS0 to MCS15 BW20/40
- Support 802.11ac MCS0 to MCS9 BW20/40/80/160 MHz with Nss = 1~2
- Support 802.11ax MCS0 to MCS11 BW20/40/80/160 MHz with Nss = 1~2
- A-MPDU/A-MSDU
- Beamformer(explicit/implicit)
- Supports 802.11w protected managed frame
- Fragmentation and defragmentation
- Support Dual band Dual Concurrent
- Support Short Guard Interval for 802.11n and 802.11ac
- Support RX Space-Time Block Code (STBC)
- Support Low Density Parity Check (LDPC) code
- Support Dual Carrier Modulation (DCM)
- Support digital pre-distortion to enhance PA performance
- Radar detection
- UL/DL MU-MIMO w/o OFDMA support
- UL/DL OFDMA users: 2.4G/4, 5G/8
- Support total 256 users
- Integrated LNA, PA and T/R switch
Application Processor MCU & Memory
- Dual-core Arm® Cortex-A53 MPCoreTM operating at 1.6 GHz
- NEON processing engine with advanced SIMD and floating-point extension
- 32KB L1 I-cache and 32KB L1 D-cache
- 256KB unified L2 cache
- Cryptography extension
- 16-bit data bus width
- Memory clock up to DDR4-3200/DDR3-2133
- QoS supported
Security
- Hardware accelerator for SKE/PKE/HASH
- Support TRNG
- Support Trustzone
- Support Secure boot
- 16Kb OTP (4Kb for functional)
Peripheral Interfaces
- 0 (host) x1
- 0(host)/PCIe Gen3 1-Lane interface/HSGMII x1
- HSGMII (5Gbps) x1
- MDC/MDIO x2
- UART for external devices and debugging interfaces x2
- SPI master for external devices x3
- 5/SD interface x1
- I2C to control peripheral devices x2
- General-Purpose Input/Output x60
- PWM (Pulse Width Modulation) x2 (4 channel)
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